Amplifier and the method thereof

ABSTRACT

An amplifier amplifying an input signal and the method thereof. The amplifier comprises first and second transconductor circuits. The first transconductor circuit, coupled to the first transistor, receives the first noise voltage to generate a first noise current. The second transconductor circuit, coupled in parallel to the first transconductor circuit, receives the second noise voltage to generate a second noise current such that the first and second noise currents cancel each other out to reduce a noise component in the output current when summing up together, and the first and second transconductor circuits are operated in a current mode.

CROSS REFERENCE TO RELATED APPLICATIONS

This application is a Continuation of U.S. patent application Ser. No. 11/964,103, filed on Dec. 26, 2007, now U.S. Pat. No. 7,633,345, the entirety of which is incorporated by reference herein.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The invention relates in general to high speed communication, and in particular, to an amplifier and the method thereof in high speed communication.

2. Description of the Related Art

The demand for high speed communication systems remains high in the recent years. The amplifier in a high speed communication system needs to meet stringent requiems such as broadband input matching, high gain, wide bandwidth, and low noise figure (NF). In addition, it is highly desirable to implement the amplifier in CMOS technology in order to perform a high level of integration, poising design challenges arising from the inferior RF characteristics of CMOS, including large parasitic capacitance, low transconductance, and low supply voltage.

In low noise amplifier (LNA) applications, the most critical parameters are noise figure NF and linearity. Noise figure NF is defined as 10 Log(SNR_(in)/SNR_(out)), with SNR_(in) and SNR_(out) being the input and output signal to noise ratio. Low noise amplifier typically includes a matching network immediately after an antenna to improve noise figure NF. The linearity may be defined by Third Order Input Intercept Point, representing the point at which the power in the third-order product and the fundamental tone intersect.

Two common impedance matching techniques, namely, common gate and resistive shunt feedback circuit configuration are typically used to construct the input impedance matching in LNA, providing wideband impedance matching. Both suffer from channel thermal noise of the transistor, accounted for the dominant noise source in an LNA.

Thus a need exists for an amplifier amplifying an input signal without introducing noise to the amplified signal.

BRIEF SUMMARY OF THE INVENTION

A detailed description is given in the following embodiments with reference to the accompanying drawings.

An amplifier amplifying an input signal to generate an output current is disclosed, comprising first and second transconductor circuits. The first transconductor circuit, coupled to the first transistor, receives the first noise voltage to generate a first noise current. The second transconductor circuit, coupled in parallel to the first transconductor circuit, receives the second noise voltage to generate a second noise current such that the first and second noise currents cancel each other out to reduce a noise component in the output current when summing up together, and the first and second transconductor circuits are operated in a current mode.

According to another embodiment of the invention, a method of amplifying an input signal to generate an output current in an amplifier is provided, comprising providing a first transistor having a channel thermal noise to establish a first noise voltage, providing a resistance device receiving the channel thermal noise to establish a second noise voltage, providing a first transconductor circuit with first transconductance to receive the first noise voltage to generate a first noise current, and providing a second transconductor circuit with second transconductance to receive the second noise voltage to generate a second noise current, such that the first and second noise currents cancel each other out to reduce a noise component in the output current. The first and second transconductance have the opposite signs, and the first and second transconductor circuits are operated in a current mode.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein:

FIG. 1 is a block diagram of an exemplary receiver according to the invention.

FIG. 2 is a block diagram of an exemplary transconductor amplifier according to the invention.

FIG. 3 is a circuit schematic of an exemplary transconductor amplifier according to the invention.

FIG. 4 is another circuit schematic of an exemplary transconductor amplifier according to the invention.

FIG. 5 is yet another circuit schematic of an exemplary transconductor amplifier according to the invention.

FIG. 6 is still another circuit schematic of an exemplary transconductor amplifier according to the invention.

FIG. 7 is a block diagram of a conventional transconductor amplifier.

DETAILED DESCRIPTION OF THE INVENTION

The following description is of the best-contemplated mode of carrying out the invention. This description is made for the purpose of illustrating the general principles of the invention and should not be taken in a limiting sense. The scope of the invention is best determined by reference to the appended claims.

FIG. 1 is a block diagram of an exemplary direct conversion receiver according to the invention, comprising antenna 100, RF filter 102, low noise amplifier (LNA) 104, mixer 106, filter 108, amplifier 110 and analog-to-digital converter (ADC) 112. Antenna 100 is coupled to RF filter 102, LNA 104, mixer 106, filter 108, amplifier 110, and subsequently to ADC 112.

Antenna 100 receives input signal RF_(in), filtered by RF filter 102 to remove out-of-band signals, amplified by LNA 104, modulated in mixer 106 with local oscillation signals LO_I and LO_Q to produce inphase and quadrature output voltages V_(I) and V_(Q), which in turn are filtered by filter 108, amplified by amplifier 110, converted to digital in analog-to-digital converter 112 to generate digital data to D_(I) and D_(Q) for performing subsequent baseband operations. Input RF signal RF_(in) comprises inphase and quadrature components, and may be a single ended signal or a differential signal pair. Local oscillation signals LO_I and LO_Q are supplied by a local oscillator (not shown) including a phase lock loop (not shown) and are 90 degree out of phase to each other. Local oscillation signals LO_I and LO_Q may also be single ended signals or differential signal pairs corresponding to input RF signal RF_(in), and typically have an oscillation frequency substantially equivalent to the center frequency of input RF signal RF_(in). Filter 108 may be a channel-select filter performing channel selection at intermediate frequency (IF). Amplifier 110 may be a programmable gain amplifier (PGA) amplifying filtered to change the amplifier gain thereof.

LNA 104 may be a variable gain amplifier amplifying weak RF signal RF_(in) to generate an amplified RF signal without introducing noise. Mixer 106 comprises a Gilbert Cell mixer that includes a transconductor stage transforming the amplified RF signal to a current signal and a quad switching stage mixing the current signal with local oscillation signals LO_I and LO_Q.

FIG. 7 is a block diagram of a conventional resistive shunt feedback transconductor, comprising feedback resistor R_(i), load resistor R_(L), and transistor Q₇₀. Feedback resistor R_(i) is coupled between the drain and gate terminals of transistor Q₇₀. Load resistor R_(L) is coupled to transistor Q₇₀ providing amplified output voltage V_(out). Transconductor circuit 7 has a negative gain −A and input impedance R_(i)/(1+A). The channel thermal noise of transistor Q₇₀ directly contributes to a noise component in amplified output voltage V_(out).

FIG. 2 is a block diagram of an exemplary low noise amplifier according to the invention, comprising impedance matching circuit 20 and transconductor amplifier 22 coupled thereto.

Impedance matching circuit 20 comprises first resistor R_(S), second resistor R_(F), current source I₂₀₀, and first transistor Q₂₀₀. First resistor R_(S) is coupled to second resistor R_(F) and transistor Q₂₀₀. Second resistor R_(F) is coupled in shunt to the drain terminal of transistor Q₂₀₀.

Impedance matching circuit 20 is a shunt feedback circuit with gain (−A), receiving input signal S_(in) to perform impedance matching thereon and producing first output voltage V_(S). First resistor R_(S) is typically selected as 50 ohm to provide input impedance matching for input signal S_(in) and generate matched input signal V_(i). Input signal V_(i) comprises first signal voltage V_(g,s) and first noise voltage V_(g,n), and output voltage V_(S) comprises second signal voltage V_(d,s) and second noise voltage V_(d,n). Second resistor R_(F) provides a feedback path between the drain terminal and gate terminal of first transistor Q₂₀₀. First transistor Q₂₀₀ is an NPN type MOSFET transistor receiving first signal voltage V_(g,s) at the gate thereof to establish signal current I_(d,s) and first signal voltage V_(d,s) at the drain. First transistor Q₂₀₀ has intrinsic channel thermal noise I_(d,n) arising from the random thermal motion of the carrier and the drift in the field, which is the dominant noise source in impedance matching circuit 20. Channel thermal noise I_(d,n) establishes first noise voltage V_(d,n) at the drain terminal and second noise voltage V_(g,n) at the gate terminal of transistor Q₂₀₀.

Transconductor amplifier 22 comprises first transconductor amplifier circuit 222 and first transconductor amplifier circuit 220 coupled in parallel to each other. First transconductor amplifier circuit 222 has positive transconductance g_(m1) and second transconductor 220 has negative transconductance −gm2. First transconductor amplifier circuit 222 receives input voltage V_(i) and second transconductor 220 receives output voltage V_(S), together establish output current I_(OUT) by (V_(i)*g_(m1)−V_(s)*g_(m2)). Output current I_(OUT) also comprises signal component I_(out,s) and noise component I_(out,n). Since impedance matching circuit 20 has negative gain (−A), first input signal voltage V_(g,s) and second output signal voltage V_(d,s) have opposite numerical signs, or, output signal voltage V_(d,s) equals to −(V_(g,s)*A), resulting in strengthened signal component I_(out,s) equaling to (V_(g,s)*g_(m1)+V_(g,s)*A*g_(m2)). On the contrary, first input noise voltage V_(g,n) and second output noise voltage V_(d,n) share an identical numerical sign, or, representing V_(g,n) by (I_(d,n)*R_(S)) and V_(d,n) by (I_(d,n)*(R_(S)+R_(F))), producing reduced noise component I_(out,n) equaling to (I_(d,n)*R_(S)*g_(m1)−I_(d,n)*(R_(S)+R_(F))*g_(m2)). First noise current (I_(d,n)*R_(S)*g_(m1)) from first transconductor circuit 222 and second current (I_(d,n)*(R_(S)+R_(F))*g_(m2)) from first transconductor circuit 220 can cancel each other out by choosing transconductance g_(m1) and g_(m2) according to Equation (1): g _(m1) /g _(m2)=1+R _(F) /R _(S)  (1) thereby producing zero noise component I_(out,n) in I_(OUT), or, a noiseless output current.

While first conductance g_(m1) is positive and second conductance g_(m2) is negative in the embodiment, it would be apparent for the people in the art that negative first conductance g_(m1) and positive second conductance g_(m2) also serves the purpose of reducing the noise component in output current I_(OUT), proper circuitry modification to the LNA in FIG. 2 can be made without deviating from the principle of the invention.

FIG. 3 is a circuit schematic of an exemplary transconductor amplifier in FIG. 2, comprising impedance matching circuit 20 and transconductor circuit 32 coupled thereto.

Impedance matching circuit 20 in FIG. 3 is identical to FIG. 2, transconductor circuit 32 comprises transistors Q₃₂₀, Q₃₂₂, Q₃₂₄, current source I₃₂₀, and capacitor C₃₂₀.

Transistor Q₃₂₄ provides positive transconductance g_(m1) in the first transconductor amplifier, and transistors Q₃₂₀ and Q₃₂₂ provide negative transconductance g_(m2) in the second transconductor amplifier in FIG. 2. The signal component in output current I_(OUT) is (V_(g,s)*g_(m1)+V_(g,s)*A*g_(m2)) and the noise component is removed by selecting the first and second transconductance g_(m1) and g_(m2) according to Equation (1).

FIG. 4 is another circuit schematic of an exemplary transconductor amplifier in FIG. 2, comprising impedance matching circuit 20 and transconductor circuit 42 coupled thereto.

Impedance matching circuit 20 in FIG. 4 is identical to FIG. 2, transconductor circuit 42 comprises transistors Q₄₂₀, Q₄₂₂, current source I₄₂₀, and capacitor C₄₂₀.

Transistor Q₄₂₂ provides positive transconductance g_(m1) in the first transconductor amplifier, and transistor Q₄₂₀ provides negative transconductance g_(m2) in the second transconductor amplifier in FIG. 2. Transconductor circuit 42 provides better device matching than transconductor circuit 32 in FIG. 3, since transistor Q₄₂₂ providing positive transconductance g_(m1) and transistor Q₄₂₂ providing negative transconductance g_(m2) share a common output loading I₄₂₀. The noise component is removed by selecting the first and second transconductance g_(m1) and g_(m2) according to Equation (1).

FIG. 5 is yet another circuit schematic of an exemplary transconductor amplifier in FIG. 2, comprising impedance matching circuit 20 and transconductor circuit 52 coupled thereto. Transconductor amplifier 5 provides a variable gain control to amplified output current I_(OUT).

Impedance matching circuit 20 in FIG. 5 is identical to FIG. 2, transconductor circuit 52 comprises transistors Q₅₂₀ through Q₅₂₆, current source I₅₂₀, and capacitor C₅₂₀.

Transistor Q₅₂₆ provides positive transconductance g_(m1) in the first transconductor amplifier, and transistor Q₅₂₄ provides negative transconductance g_(m2) in the second transconductor amplifier in FIG. 2. Control signal S_(c) controls transistors Q₅₂₀ and Q₅₂₂ to provide variable gain control to output current I_(OUT). When Control signal S_(c) turns transistor Q₅₂₀ on, the output current I_(OUT) is reduced, providing a low gain mode. The noise component is removed by selecting the first and second transconductance g_(m1) and g_(m2) according to Equation (1).

FIG. 6 is still another circuit schematic of an exemplary transconductor amplifier in FIG. 2, comprising impedance matching circuit 60 and transconductor circuit 62 coupled thereto. Amplifier 6 is implemented in differential circuit configuration, taking a differential input pair S_(in) to provide amplified output current I_(OUT).

Impedance matching circuit 60. Transconductor circuit 62 comprises transistors Q_(620a,b) and Q_(622a,b), current source I₆₂₀, and capacitors C_(620a,b).

Transistors Q_(622a,b) provide positive transconductance g_(m1) in the first transconductor amplifier, and transistors Q_(622a,b) provide negative transconductance g_(m2) in the second transconductor amplifier. The noise component is removed by selecting the first and second transconductance g_(m1) and g_(m2) according to Equation (1).

While the invention has been described by way of example and in terms of preferred embodiment, it is to be understood that the invention is not limited thereto. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements. 

1. An amplifier amplifying an input signal to generate an output current, comprising: a first transconductor circuit, coupled to a first transistor, receiving a first noise voltage to generate a first noise current; and a second transconductor circuit, coupled in parallel to the first transconductor circuit, receiving a second noise voltage to generate a second noise current, such that the first and second noise currents mutually cancel each other so as to reduce a noise component in the output current, and the first and second transconductor circuits are operated in a current mode.
 2. The amplifier of claim 1, wherein the first transistor is arranged to generate an amplified signal according to the input signal with a negative gain, the first transconductor circuit is arranged to generate a first signal current according to the input signal, and the second transconductor circuit is arranged to generate a second signal current according to the amplified signal such that the first and second signal currents accumulates to increase a signal component in the output current when summing up together.
 3. The amplifier of claim 1, wherein a transconductance of the first transconductor circuit is positive and a transconductance of the second transconductor circuit is negative.
 4. The amplifier of claim 1, wherein: the first transistor having a first gate, a first drain, and a first source; the first transconductor circuit comprises a second transistor having a second gate coupled to the first gate, a second drain, and a second source coupled to the ground, the second transconductor circuit comprises: a third transistor having a third gate coupled to the first drain, a third drain coupled to a voltage source, and a third source coupled to a current source; and a fourth transistor having a fourth gate coupled to the ground through a capacitor, a fourth drain coupled to the second drain, and a fourth source coupled to the third source and the current source.
 5. The amplifier of claim 1, further comprising a third transconductor circuit, wherein: the first transistor having a first gate, a first drain, and a first source; the second transconductor circuit comprises a second transistor having a second gate coupled to the first gate, a second drain, and a second source coupled to a current source, the third transconductor circuit comprises a third transistor having a third gate coupled to the first drain, a third drain coupled to a voltage source, and a third source coupled to the second source and the current source.
 6. The amplifier of claim 5, further comprising: a fourth transistor having a fourth gate, a fourth drain coupled to the voltage source, and a fourth source coupled to the second drain; and a fifth transistor having a fifth gate, a fifth drain, and a fifth source coupled to the second drain.
 7. The amplifier of claim 1, wherein the input signal is a differential signal pair, circuit components in the amplifier are constructed by transistor pairs.
 8. A method of amplifying an input signal to generate an output current in an amplifier, comprising: providing a first transistor having a channel thermal noise to establish a first noise voltage; providing a resistance device receiving the channel thermal noise to establish a second noise voltage; providing a first transconductor circuit with first transconductance to receive the first noise voltage to generate a first noise current; providing a second transconductor circuit with second transconductance to receive the second noise voltage to generate a second noise current, such that the first and second noise currents mutually cancel each other out to reduce a noise component in the output current; and wherein the first and second transconductance have the opposite signs, and the first and second transconductor circuits are operated in a current mode.
 9. The method of claim 8, wherein the first transconductance is positive and the second transconductance is negative.
 10. The method of claim 8, wherein the input signal is a differential signal pair, circuit components in the first and second transconductor circuits are constructed by transistor pairs.
 11. The method of claim 8, wherein the first transistor is arranged to generate an amplified signal according to the input signal with a negative gain, the first transconductor circuit is arranged to generate a first signal current according to the input signal, and the second transconductor circuit is arranged to generate a second signal current according to the amplified signal such that the first and second signal currents accumulates to increase a signal component in the output current when summing up together. 